Verification And Validation Of The Devs Models

Dublin Core

Title

Verification And Validation Of The Devs Models

Author

Zengin, Ahmet
Köklükaya, Etem
Ekiz, Hüseyin

Abstract

Simulation remains attractive for teaching, training and performance analysis of computer networks. This paper presents a robust simulation environment targeted for teaching and learning the complex dynamics of computer networks. The general-purpose DEVS-Suite simulator supports animation with I/O and state trajectories of computer network models developed using parallel DEVS modeling approach. The simulator offers high-level model abstraction as compared with simulators such as ns-2. The combined capabilities afforded by the robust DEVS-Suite simulator assists in understanding the fundamentals of computer network topologies and the logics of communication protocols. This newly developed DEVSSuite offers an expressive, yet relatively simple to use, simulation environment for students and educators to develop and experiment with computer network models. The paper concludes with observations on the proposed modeling approach and outline some evaluations. In this paper we discuss verification and validation of DEVS simulation models. Four different approaches to deciding model validity are described; two different paradigms that relate verification and validation to the model development process are presented; various validation techniques are defined; conceptual model validity, model verification, operational validity, and data validity are discussed; a way to document results is given; a recommended procedure for model validation is presented; and model accreditation is briefly discussed.

Keywords

Conference or Workshop Item
PeerReviewed

Date

2010-06

Extent

539

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